Configuration settings of driver

Macros
#define	USE_ADC_DMA   1
#define	USE_FRSTDATA   0
#define	QUICK_READ   1
#define	ALLOW_XINTF_SPEEDUP   0
#define	FORCE_PCB_REV   0x0
#define	USE_EXT_RAM   1
#define	USE_256kB_RAM   1
#define	DAC_USE_VCC_AS_REF   0
#define	DAC_USE_REF_BUFFER   1
#define	DAC_USE_GAINx2   1
#define	USE_SCI_TX_FIFO   1
#define	USE_SCI_RX_FIFO   1

Detailed Description

Macro Definition Documentation

#define ALLOW_XINTF_SPEEDUP   0

Set to 1 to allow lower XINTF timings, i.e. quicker reads and writes. Allow only when CPLD has a new version of FW, at least version 4. MLC_init() however checks version of CPLD firmware and automatically enables this speedup when version is correct. If there is some issues with reading data from ADC (usually swapped low and high word of result), then disabling this feature is recommended.

Definition at line 58 of file MLC_drv_config.h.

#define DAC_USE_GAINx2   1

Set output stage gain of DAC to 2x when 1, else 1x. This is useful when Vref is 2,5V and we demand output swing of DAC in range 0 to 5V. When option DAC_USE_VCC_AS_REF is set to 1, then this option has no meaning and gain will be always 1x.

Definition at line 92 of file MLC_drv_config.h.

#define DAC_USE_REF_BUFFER   1

Turn on(1)/off(0) internal reference voltage buffers of DAC.

Definition at line 84 of file MLC_drv_config.h.

#define DAC_USE_VCC_AS_REF   0

If set to 1 then Vcc = 5V is applied as ref. signal for DAC. Allowing this flag automatically disables DAC_USE_GAINx2 option.

Definition at line 79 of file MLC_drv_config.h.

#define FORCE_PCB_REV   0x0

If > 0 then PCB revision is forced to be value of FORCE_REV. Useful only for debug.

Definition at line 63 of file MLC_drv_config.h.

#define QUICK_READ   1

Set to 1 to enable quick read, reading of 16 values takes ~1,7us. Set to 0 to save some memory, but prolong reading to ~2,5us. This flag has no meaning when DMA transfers are used.

Definition at line 51 of file MLC_drv_config.h.

#define USE_256kB_RAM   1

If set to 1 then it disable BTN_S7, but extend ext. memory size to 256kB, this flag is applicable to eZdsp 28335 kit replacement by T.Kosan only.

Definition at line 74 of file MLC_drv_config.h.

#define USE_ADC_DMA   1

Allow DMA for ADC conversion results transfer. This flag ensures proper configuration of DMA transfers. ADC uses channels CH1 - CH3. Interrupt after DMA transfer end has to be individualy enabled for each DMA transfer channel by function MLC_enable_DMA_isr().

Definition at line 39 of file MLC_drv_config.h.

#define USE_EXT_RAM   1

Allow using of external RAM, set to 1 to configure XINTF to work with ext. RAM.

Definition at line 68 of file MLC_drv_config.h.

#define USE_FRSTDATA   0

Set to 1 to check first data of ADC, usefull when we do not read all data from A/D but it can be tricky, it is better always read all data. This flag has no meaning when DMA transfers are used.

Definition at line 45 of file MLC_drv_config.h.

#define USE_SCI_RX_FIFO   1

This option allows using of RX FIFO of SCI. FIFO is 16 bytes deep and can help avoid loosing of data received.

Definition at line 104 of file MLC_drv_config.h.

#define USE_SCI_TX_FIFO   1

This option allows using of TX FIFO of SCI. FIFO is 16 bytes deep and can significantly decrease CPU overhead.

Definition at line 98 of file MLC_drv_config.h.