MLC_drv.h

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#ifndef MLC_DRV_H_
#define MLC_DRV_H_

#include "stdint.h"
#include "platform.h"
#include "MLC_drv_config.h"
#include "MLC_ext_module.h"

typedef struct{
        uint16_t cpld_fw_ver; 
        uint16_t fpga_fw_ver; 
        uint16_t pcb_hw_ver;  
        uint16_t adc_conf;    
        uint16_t mod_fw_ver;  
} mlc_info_t;           
typedef struct{
  int16_t in0;         
  int16_t in0_low;     
  int16_t in1;         
  int16_t in1_low;     
  int16_t in2;         
  int16_t in2_low;     
  int16_t in3;         
  int16_t in3_low;     
  int16_t in4;         
  int16_t in4_low;     
  int16_t in5;         
  int16_t in6_low;     
  int16_t in7;         
  int16_t in7_low;     
  int16_t in8;         
  int16_t in8_low;     
} mlc_adc_result; 
extern mlc_info_t* pMLC_info_struct; 
extern mlc_info_t MLC_info_struct; /*< Internal MLC_info structure, which holds informations about MLC interface. */

#if MCU_TYPE == MCU_TYPE_TMS320F2812 || MCU_TYPE == MCU_TYPE_TMS320F28335
// ZONE0, address 0x0000
#define BASE_ADDRESS 0x00004000 
#endif

#if MCU_TYPE == MCU_TYPE_TMS570LS3137
#define BASE_ADDRESS 0x60000000u        
#endif

/*--LATEX-CPLD-BLOCK-START--*/
/*******************************************************************************************/
// CPLD has address offset range 0xF
// write addresses constants
#define WRITE_AD_CONF   0x0000  
#define WRITE_PWR_OUT   0x0001  
#define WRITE_SETRES_AD 0x0002  
#define WRITE_CLRRES_AD 0x0003  
#define WRITE_DBGLEDS   0x0004  
// read addresses constants
#define READ_VER                0x0000  
#define READ_AD1                0x0001  
#define READ_AD2                0x0002  
#define READ_AD3                0x0003  
#define READ_HV_INPUT   0x0004  
#define READ_ARC                0x0005  
#define READ_UIO                0x0009  
#define READ_PCB_REV    0x000F  
// read+write addresses constants
#define RW_CS_EXT1              0x0006  
#define RW_CS_EXT2              0x0007  
#define RW_CS_EXT3              0x0008  
#define RW_UIO                  0x0009  
#define RW_UIO_CONF             0x000A  
/*******************************************************************************************/
/*--LATEX-CPLD-BLOCK-END--*/

/*--LATEX-FPGA-BLOCK-START--*/
/*******************************************************************************************/
// FPGA uses addresses higher than 0xF
#define READ_FPGA_VER   0x0010  
#define RW_FPGA_LED_REG 0x0011

#define WRITE_LCD_DISP  0x0012  
#define FPGA_RESERVED_13   0x0013 
#define FPGA_RESERVED_14   0x0014 
#define FPGA_RESERVED_15   0x0015 
#define FPGA_RESERVED_16   0x0016 
#define FPGA_FAULTS_ADDR   0x0017 
#define FPGA_RESERVED_18   0x0018 
#define FPGA_RESERVED_19   0x0019 
#define FPGA_RESERVED_1A   0x001A 
#define FPGA_RESERVED_1B   0x001B 
#define FPGA_RESERVED_1C   0x001C 
#define FPGA_RESERVED_1D   0x001D 
#define FPGA_RESERVED_1E   0x001E 
#define FPGA_RESERVED_1F   0x001F 
#define FPGA_LEDS_SHOW_DATA             0x0000 
#define FPGA_LEDS_SHOW_PWMA             0x0100 
#define FPGA_LEDS_SHOW_PWMB             0x0200 
#define FPGA_LEDS_SHOW_PWMC             0x0300 
#define FPGA_LEDS_SHOW_PWMD             0x0400 
#define FPGA_LEDS_SHOW_PWME             0x0500 
#define FPGA_LEDS_SHOW_PWMF             0x0600 
/*******************************************************************************************/
/*--LATEX-FPGA-BLOCK-END--*/

// AD numbering
#define AD_CH1                  0x1             
#define AD_CH2                  0x2             
#define AD_CH3                  0x4             
#define AD_SOCA                 0x1             
#define AD_SOCB                 0x2             
#define AD_SOCC                 0x4             
// AD config values
// oversampling setup values
// no OS
#define AD_OS0                  0x0000  
// 2xOS
#define AD_OS1                  0x0001  
// 4xOS
#define AD_OS2                  0x0002  
// 8xOS
#define AD_OS3                  0x0003  
// 16x OS
#define AD_OS4                  0x0004  
// 32xOS
#define AD_OS5                  0x0005  
// 64xOS
#define AD_OS6                  0x0006  
// range select constants
#define AD_RNG_5V               0x0000  
#define AD_RNG_10V              0x0001  
// Parameters for MLC_setup_AD_SOC() function
// mapping of convstart pins to ADs
// each AD has it own convstart pin
// CH1 - GPIO32/ADSOCA
// CH2 - GPIO33/ADSOCB
// CH3 - GPIO61 - no ADSOC from EV manager

#define AD_SOC_ALL_DEFAULT              0x0000  
#define AD_SOC_CH3_SOCA                 0x1000  
#define AD_SOC_CH3_SOCB                 0x2000  
#define AD_SOC_CH3_SOCAB                0x3000  
#define AD_SOC_ALL_SOCA                 0x4000  
#define AD_SOC_ALL_SOCB                 0x5000  
// This flag turns on use of EOC interrupt
// It will use XINT1
//#define USE_AD_INTERRUPT      1       /*!< Allow ADC end of conversion interrupt */

#define AD_IN0          0                       
#define AD_IN1          2                       
#define AD_IN2          4                       
#define AD_IN3          6                       
#define AD_IN4          8                       
#define AD_IN5          10                      
#define AD_IN6          12                      
#define AD_IN7          14                      
#define DMA_ADCH1       AD_CH1                  
#define DMA_ADCH2       AD_CH2                  
#define DMA_ADCH3       AD_CH3                  
#define PCB_REV_1               0x1             
#define PCB_REV_2               0x2             
#define PCB_REV_3               0x3             
// define buttons, they are active at 0, data is inverted
// i.e. pushed button means that BTN_Sx returns '1'
#if MCU_TYPE == MCU_TYPE_TMS320F28335
        #define CHECK_BTN_S5()          !GpioDataRegs.GPADAT.bit.GPIO28 
        #define CHECK_BTN_S8()          !GpioDataRegs.GPADAT.bit.GPIO29 
        #define CHECK_BTN_S6()          !GpioDataRegs.GPADAT.bit.GPIO30 
        #if USE_256kB_RAM == 1
                #define CHECK_BTN_S7()          0                                                               
        #else
                #define CHECK_BTN_S7()          !GpioDataRegs.GPADAT.bit.GPIO31 
        #endif
#endif


#if MCU_TYPE == MCU_TYPE_TMS320F2812
#define CHECK_BTN_S5()          !GpioDataRegs.GPFDAT.bit.GPIOF8  
#define CHECK_BTN_S8()          !GpioDataRegs.GPFDAT.bit.GPIOF9  
#define CHECK_BTN_S6()          !GpioDataRegs.GPFDAT.bit.GPIOF10 
#define CHECK_BTN_S7()          !GpioDataRegs.GPFDAT.bit.GPIOF11 
#endif

#if MCU_TYPE == MCU_TYPE_TMS570LS3137
#define CHECK_BTN_S5()          gioGetBit(gioPORTA, 3)  
#define CHECK_BTN_S8()          gioGetBit(gioPORTA, 2)  
#define CHECK_BTN_S6()          gioGetBit(gioPORTA, 4)  
#define CHECK_BTN_S7()          gioGetBit(gioPORTA, 0)  
void DELAY_US(float us); 
#endif


void MLC_init();

void MLC_global_enable();       
void MLC_global_disable();      
void MLC_PWR_on(uint16_t pwr);

void MLC_PWR_off(uint16_t pwr);

void MLC_DBG_set(uint16_t dbg);

void MLC_DBG_clear(uint16_t dbg);

// read/write macros - subtitute of inline functions, which do not work properly
// these macros allows to comunicate at rate about 20MB/s
#define MLC_WRITE(addr, data) *((volatile uint16_t*)BASE_ADDRESS+addr)=(uint16_t)(data)

#define MLC_READ(addr) *((volatile uint16_t*)BASE_ADDRESS+addr)

// ordinary functions with same behaviour as macros above
// there are slower (~4MB/s) but, saves some memory
__inline void MLC_write(uint16_t addr, uint16_t data) {*((volatile uint16_t*)(BASE_ADDRESS+addr))=(uint16_t)data;}
__inline uint16_t MLC_read(uint16_t addr) {return *((volatile uint16_t*)(BASE_ADDRESS+addr));}

#define FPGA_check_faults() MLC_READ(FPGA_FAULTS_ADDR)

#define NO_FAULTS 0x3F

void MLC_ADC_reset(void);

void MLC_ADC_setup(unsigned int os_1, unsigned int os_2, unsigned int os_3, unsigned int rng_1, unsigned int rng_2, unsigned int rng_3);

void MLC_ADC_setup_SOC(uint16_t adsoc);

void MLC_ADC_start_conv(void);

void MLC_ADC_start_one_conv(uint16_t channel);

volatile int16_t* MLC_ADC1_read(void);

volatile int16_t* MLC_ADC2_read(void);

volatile int16_t* MLC_ADC3_read(void);

volatile int16_t* MLC_ADC1_get_res_ptr(void);

volatile int16_t* MLC_ADC2_get_res_ptr(void);

volatile int16_t* MLC_ADC3_get_res_ptr(void);

volatile mlc_adc_result* MLC_ADC1_get_res_strptr(void);

volatile mlc_adc_result* MLC_ADC2_get_res_strptr(void);

volatile mlc_adc_result* MLC_ADC3_get_res_strptr(void);

volatile int16_t* MLC_ADC_read(volatile int16_t* ad_res, uint16_t ad_addr);

unsigned int MLC_ADC_wait(void);

// helper function, it calculate voltage from measured value
float MLC_ADC_calc_volt(int16_t value, uint16_t range);

void MLC_ADC_enable_isr(interrupt void* handler);

void MLC_ADC_disable_isr(void);


// F2812 lacks DMA support
#if MCU_TYPE == MCU_TYPE_TMS320F28335  || MCU_TYPE == MCU_TYPE_TMS570LS3137

void MLC_DMA_enable_isr(uint16_t channel, interrupt void* handler);

void MLC_DMA_disable_isr(uint16_t channel);

uint16_t MLC_DMA_active(void);

void MLC_DMA_activate(void);

void MLC_DMA_deactivate(void);


#endif

// functions for LCD display, FPGA must have basic design to those functions work
void MLC_LCD_write_to(uint16_t pos, char chr);
void MLC_LCD_write_str(char* pStr, uint16_t pos);

void MLC_LCD_clrscr(void);

// constants corresponding
// with PCB marking of ADC outputs
#define DAC_CH_A        0       
#define DAC_CH_B        1       
#define DAC_CH_C        2       
#define DAC_CH_D        3       
#define DAC_CH_E        4       
#define DAC_CH_F        5       
#define DAC_CH_G        6       
#define DAC_CH_H        7       
extern uint16_t dac_values[8];  
extern uint16_t dac_sel_ch[8];  
void MLC_DAC_reset(void);                               
void MLC_DAC_control(uint16_t cmd);

void MLC_DAC_write(uint16_t count);
void MLC_DAC_init(void);

#define dac_reset()                             MLC_DAC_reset()                         
#define dac_control                                     MLC_DAC_control                         
#define dac_write                                       MLC_DAC_write                           
#define write_dac                                       MLC_DAC_write                           
#define dac_init()                                      MLC_DAC_init()                          
#define dac_sel_channel                         dac_sel_ch                                      
#define dac_variables                           dac_values                                      
#define DEBUG_LEVEL_NONE        0 
#define DEBUG_LEVEL_ERR         1 
#define DEBUG_LEVEL_WRN         2 
#define DEBUG_LEVEL_INFO        3 
#if DEBUG_LEVEL == DEBUG_LEVEL_INFO
        #define DBG_ERR_PUTS(str)       puts(str)       
        #define DBG_WRN_PUTS(str)       puts(str)       
        #define DBG_INFO_PUTS(str)      puts(str)       
#endif

#if DEBUG_LEVEL == DEBUG_LEVEL_WRN
        #define DBG_ERR_PUTS(str)       puts(str)       
        #define DBG_WRN_PUTS(str)       puts(str)       
        #define DBG_INFO_PUTS(str)      ;                       
#endif

#if DEBUG_LEVEL == DEBUG_LEVEL_ERR
        #define DBG_ERR_PUTS(str)       puts(str)       
        #define DBG_WRN_PUTS(str)       ;                       
        #define DBG_INFO_PUTS(str)      ;                       
#endif

#if DEBUG_LEVEL == DEBUG_LEVEL_NONE
        #define DBG_ERR_PUTS(str)       ;                       
        #define DBG_WRN_PUTS(str)       ;                       
        #define DBG_INFO_PUTS(str)      ;                       
#endif

void MLC_SCI_init(uint32_t baudrate);
void MLC_SCI_send_char(char c);
void MLC_SCI_send_str(char* str);
char MLC_SCI_recv_char(void);

char MLC_SCI_char_avail(void);

char MLC_SCI_wait_send(void);

void MLC_SCI_send_char_wait(char c);

#endif /* end of MLC_drv */