MLC_drv.c

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/*
 * Platform independent include section
 */

#include "platform.h"
#include "MLC_drv.h"
#include <stdint.h>
#include <stdio.h>

/*
 * Platform dependent include section
 */

#if MCU_TYPE == MCU_TYPE_TMS320F28335
#include "DSP2833x_Device.h"
#include "DSP2833x_Examples.h"
#endif

#if MCU_TYPE == MCU_TYPE_TMS320F2812
#include "DSP281x_Device.h"
#include "DSP281x_Examples.h"
#endif

#if MCU_TYPE == MCU_TYPE_TMS570LS3137
#include "emif.h"
#include "sys_common.h"
#include "system.h"
#include "het.h"
#include "gio.h"
#include "spi.h"
#include "sys_vim.h"
#include "sys_dma.h"
#endif

/*
 * Platform dependent #define section
 */

#if MCU_TYPE == MCU_TYPE_TMS570LS3137
#define PIN_STARTCONVA (uint32)(1U << 21U)
#define PIN_STARTCONVB (uint32)(1U << 20U)
#define PIN_STARTCONVC (uint32)(1U << 22U)

#define READ_ADC_ALL    0xFF

#define MLC_READ_32(addr) *((volatile uint32_t*)BASE_ADDRESS+addr)

#endif

/*
 * Plaform independent define section
 */

// arrays for storing results
#define AD_LEN 16

/*
 * Platform dependent global variables section
 */

// place ad results to RAM which can be DMA accessed
#if MCU_TYPE == MCU_TYPE_TMS320F28335
#pragma DATA_SECTION(AD_dma_res_1, "DMARAML6")
volatile int16_t AD_dma_res_1[16];
#pragma DATA_SECTION(AD_dma_res_2, "DMARAML6")
volatile int16_t AD_dma_res_2[16];
#pragma DATA_SECTION(AD_dma_res_3, "DMARAML6")
volatile int16_t AD_dma_res_3[16];
#endif

#if MCU_TYPE == MCU_TYPE_TMS320F2812
volatile int16_t AD_dma_res_1[16];
volatile int16_t AD_dma_res_2[16];
volatile int16_t AD_dma_res_3[16];
#endif

#if MCU_TYPE == MCU_TYPE_TMS570LS3137
volatile int16_t AD_dma_res_1[16];
volatile int16_t AD_dma_res_2[16];
volatile int16_t AD_dma_res_3[16];

t_isrFuncPTR    adc_convend_handler;

g_dmaCTRL g_dmaCTRLPKT;    /* dma control packet configuration stack */

spiDAT1_t spi2_conf;

#endif

/*
 * Platform independent global variables
 */

// create pointers to ADC buffers
volatile int16_t* AD_res_1 = AD_dma_res_1;
volatile int16_t* AD_res_2 = AD_dma_res_2;
volatile int16_t* AD_res_3 = AD_dma_res_3;

volatile mlc_adc_result* AD_res_1_struct = (mlc_adc_result*) AD_dma_res_1;
volatile mlc_adc_result* AD_res_2_struct = (mlc_adc_result*) AD_dma_res_2;
volatile mlc_adc_result* AD_res_3_struct = (mlc_adc_result*) AD_dma_res_3;

// dac
uint16_t dac_values[8];
uint16_t dac_sel_ch[8];

// pwr outputs buffer
volatile uint16_t pwr_out_state = 0;
// debug LEDs state
volatile uint16_t dbg_state = 0;

volatile int temp;

mlc_info_t MLC_info_struct;
mlc_info_t* pMLC_info_struct = &MLC_info_struct;
uint16_t ad_conf = 0;
uint16_t ad_soc_conf = 0;

/*
 * Interrupt handlers
 */

//#if USE_AD_INTERRUPT == 1
#if MCU_TYPE == MCU_TYPE_TMS320F2812 || MCU_TYPE == MCU_TYPE_TMS320F28335
// TMS320Fxxxx needs this while TMS570 not
interrupt
#endif
void isr_conv_end(void){
        // unimplemented ... consider implementing your own handler.
        //ESTOP0;
#if MCU_TYPE == MCU_TYPE_TMS320F28335
        PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
#endif

#if MCU_TYPE == MCU_TYPE_TMS570LS3137
        asm(" MOV R0, R0"); // NOP
#endif
}

#if MCU_TYPE == MCU_TYPE_TMS570LS3137 //TODO: Implement ISR of ADC conv end

void dmaConfigCtrlPacket(uint32 sadd,uint32 dadd,uint32 dsize)
{
  g_dmaCTRLPKT.SADD      = sadd;                          /* source address             */
  g_dmaCTRLPKT.DADD      = dadd;                          /* destination  address       */
  g_dmaCTRLPKT.CHCTRL    = 0;                 /* channel control            */
  g_dmaCTRLPKT.FRCNT     = 1;                 /* frame count                */
  g_dmaCTRLPKT.ELCNT     = dsize;             /* element count              */
  g_dmaCTRLPKT.ELDOFFSET = 4;                 /* element destination offset */
  g_dmaCTRLPKT.ELSOFFSET = 0;                     /* element destination offset */
  g_dmaCTRLPKT.FRDOFFSET = 0;                     /* frame destination offset   */
  g_dmaCTRLPKT.FRSOFFSET = 0;                 /* frame destination offset   */
  g_dmaCTRLPKT.PORTASGN  = 4;                 /* port b                     */
  g_dmaCTRLPKT.RDSIZE    = ACCESS_16_BIT;         /* read size                  */
  g_dmaCTRLPKT.WRSIZE    = ACCESS_16_BIT;         /* write size                 */
  g_dmaCTRLPKT.TTYPE     = FRAME_TRANSFER ;   /* transfer type              */
  g_dmaCTRLPKT.ADDMODERD = ADDR_OFFSET;       /* address mode read          */
  g_dmaCTRLPKT.ADDMODEWR = ADDR_INC1;         /* address mode write         */
  g_dmaCTRLPKT.AUTOINIT  = AUTOINIT_ON;       /* autoinit                   */
}

#pragma CODE_STATE(gio_isr_handler, 32)
#pragma INTERRUPT(gio_isr_handler, IRQ)

void gio_isr_handler(void){
        // check if it is GIOA5 and autoclear int flag
        int32_t offset = gioREG->OFF1 - 1U;
    // adc conversion end isr
        if (offset == 5){
        // some code
                adc_convend_handler();
    }
}
#endif

//#endif
#if MCU_TYPE == MCU_TYPE_TMS320F2812 || MCU_TYPE == MCU_TYPE_TMS320F28335
interrupt
#endif
void dma_transfer_end(void){
        // unimplemented ... consider implementing your own handler.
        //ESTOP0;
#if MCU_TYPE == MCU_TYPE_TMS570LS3137 //TODO: Implement DMA transfer end
        asm(" MOV R0, R0"); // NOP
#endif

#if MCU_TYPE == MCU_TYPE_TMS320F28335
        PieCtrlRegs.PIEACK.all = PIEACK_GROUP7;
#endif
}

/*
 * Support functions
 */
#ifndef TMS570LS3137_CLK
        #define TMS570LS3137_CLK 180000000
#endif

#define DELAY_1US               13

#if MCU_TYPE == MCU_TYPE_TMS570LS3137
        /*
         *  Simple delay function with 1us resolution, 330s is maximal delay
         */
        void DELAY_US(float us){
                register uint32_t i;
                for (i=0;i<(uint32_t)(us*DELAY_1US);i++){
                }
        }
#endif

/*
 * Init of GPIO, 28335 needs to switch pins to XINTF
*/

void MLC_init_F28335(void){

#if MCU_TYPE == MCU_TYPE_TMS320F28335
        EALLOW;
        // XZCS0
        GpioCtrlRegs.GPBMUX1.bit.GPIO36 = 0x3;
#if USE_EXT_RAM == 1
        // XZCS7
        GpioCtrlRegs.GPBMUX1.bit.GPIO37 = 0x3;
#endif
        // XWE0
        GpioCtrlRegs.GPBMUX1.bit.GPIO38 = 0x3;
        // XA0 - XA7
        GpioCtrlRegs.GPBMUX1.bit.GPIO40 = 0x3;
        GpioCtrlRegs.GPBMUX1.bit.GPIO41 = 0x3;
        GpioCtrlRegs.GPBMUX1.bit.GPIO42 = 0x3;
        GpioCtrlRegs.GPBMUX1.bit.GPIO43 = 0x3;
        GpioCtrlRegs.GPBMUX1.bit.GPIO44 = 0x3;
        GpioCtrlRegs.GPBMUX1.bit.GPIO45 = 0x3;
        GpioCtrlRegs.GPBMUX1.bit.GPIO46 = 0x3;
        GpioCtrlRegs.GPBMUX1.bit.GPIO47 = 0x3;

        // XD15 - XD0
        GpioCtrlRegs.GPCMUX1.bit.GPIO64 = 0x3;
        GpioCtrlRegs.GPCMUX1.bit.GPIO65 = 0x3;
        GpioCtrlRegs.GPCMUX1.bit.GPIO66 = 0x3;
        GpioCtrlRegs.GPCMUX1.bit.GPIO67 = 0x3;
        GpioCtrlRegs.GPCMUX1.bit.GPIO68 = 0x3;
        GpioCtrlRegs.GPCMUX1.bit.GPIO69 = 0x3;
        GpioCtrlRegs.GPCMUX1.bit.GPIO70 = 0x3;
        GpioCtrlRegs.GPCMUX1.bit.GPIO71 = 0x3;
        GpioCtrlRegs.GPCMUX1.bit.GPIO72 = 0x3;
        GpioCtrlRegs.GPCMUX1.bit.GPIO73 = 0x3;
        GpioCtrlRegs.GPCMUX1.bit.GPIO74 = 0x3;
        GpioCtrlRegs.GPCMUX1.bit.GPIO75 = 0x3;
        GpioCtrlRegs.GPCMUX1.bit.GPIO76 = 0x3;
        GpioCtrlRegs.GPCMUX1.bit.GPIO77 = 0x3;
        GpioCtrlRegs.GPCMUX1.bit.GPIO78 = 0x3;
        GpioCtrlRegs.GPCMUX1.bit.GPIO79 = 0x3;

        // TODO: reduce XA only to used ones
        // XA8 - XA15
        GpioCtrlRegs.GPCMUX2.bit.GPIO80 = 0x3;
        GpioCtrlRegs.GPCMUX2.bit.GPIO81 = 0x3;
        GpioCtrlRegs.GPCMUX2.bit.GPIO82 = 0x3;
        GpioCtrlRegs.GPCMUX2.bit.GPIO83 = 0x3;
        GpioCtrlRegs.GPCMUX2.bit.GPIO84 = 0x3;
        GpioCtrlRegs.GPCMUX2.bit.GPIO85 = 0x3;
        GpioCtrlRegs.GPCMUX2.bit.GPIO86 = 0x3;
        GpioCtrlRegs.GPCMUX2.bit.GPIO87 = 0x3;
        // XA - 16
        GpioCtrlRegs.GPBMUX1.bit.GPIO39 = 0x3;

#if USE_256kB_RAM == 1
        // enable XA17 as XINTF -> allow addresing of 256kB
        GpioCtrlRegs.GPAMUX2.bit.GPIO31 = 0x3;
#endif

/*
 *      Initialize GPIO according to MLC interface hardware
 */
        // configure pins for AD converter - outputs
        // CONVSTA
        GpioCtrlRegs.GPBMUX1.bit.GPIO32 = 0x0;
        GpioCtrlRegs.GPBDIR.bit.GPIO32 = 0x1;
        // CONVSTB
        GpioCtrlRegs.GPBMUX1.bit.GPIO33 = 0x0;
        GpioCtrlRegs.GPBDIR.bit.GPIO33 = 0x1;

        // prepare first conversion - goto idle state
        GpioDataRegs.GPBSET.bit.GPIO32 = 0x1;
        GpioDataRegs.GPBSET.bit.GPIO33 = 0x1;

        // AD busy - input
        GpioCtrlRegs.GPAMUX2.bit.GPIO25 = 0x0;
        GpioCtrlRegs.GPADIR.bit.GPIO25 = 0x0;

        // FRST data - input
        GpioCtrlRegs.GPBMUX1.bit.GPIO35 = 0x0;
        GpioCtrlRegs.GPBDIR.bit.GPIO35  = 0x0;

        // Buttons
        GpioCtrlRegs.GPAMUX2.bit.GPIO29 = 0x0;
        GpioCtrlRegs.GPADIR.bit.GPIO29  = 0x0;
        GpioCtrlRegs.GPAMUX2.bit.GPIO30 = 0x0;
        GpioCtrlRegs.GPADIR.bit.GPIO30  = 0x0;
#if USE_256kB_RAM != 1
        // use XA17 as button input
        GpioCtrlRegs.GPAMUX2.bit.GPIO31 = 0x0;
        GpioCtrlRegs.GPADIR.bit.GPIO31  = 0x0;
#endif
        GpioCtrlRegs.GPAMUX2.bit.GPIO28 = 0x0;
        GpioCtrlRegs.GPADIR.bit.GPIO28  = 0x0;


        // IRC input 50,51,53 EQEP1
        GpioCtrlRegs.GPBMUX2.bit.GPIO50 = 0x1;
        GpioCtrlRegs.GPBMUX2.bit.GPIO51 = 0x1;
        GpioCtrlRegs.GPBMUX2.bit.GPIO53 = 0x1;

        GpioCtrlRegs.GPBQSEL2.bit.GPIO50 = 0x1;
        GpioCtrlRegs.GPBQSEL2.bit.GPIO51 = 0x1;
        GpioCtrlRegs.GPBQSEL2.bit.GPIO53 = 0x1;
        GpioCtrlRegs.GPBCTRL.bit.QUALPRD2 = 0x0F;


        GpioCtrlRegs.GPBQSEL2.bit.GPIO50 = 0; // Synch to SYSCLKOUT
        GpioCtrlRegs.GPBQSEL2.bit.GPIO51 = 0; // Synch to SYSCLKOUT
        GpioCtrlRegs.GPBQSEL2.bit.GPIO53 = 0; // Synch to SYSCLKOUT

        EDIS;

/*
 * Configure XINTF timings
 */

/*
        ---------|___________|----------

        <XRDLEAD> <XRDACTIVE> <XRDTRAIL>

        <           adresa             >
        ------------------<data>--------
*/
        // 26 ns cycle granularity
        EALLOW;
        // 16-bit data bus wide interface
        XintfRegs.XTIMING0.bit.XSIZE = 0x3;

        // do not use READY
        XintfRegs.XTIMING0.bit.USEREADY = 0x0;
        XintfRegs.XTIMING0.bit.READYMODE = 0x0;

        // XINTF read timing
        XintfRegs.XTIMING0.bit.XRDLEAD   = 0x1;//1 //26ns
        XintfRegs.XTIMING0.bit.XRDACTIVE = 0x3;//3 //78ns
        XintfRegs.XTIMING0.bit.XRDTRAIL  = 0x0;//0 //0ns -- not valid ?

        // XINTF write timing
        XintfRegs.XTIMING0.bit.XWRLEAD   = 0x1;//1 //26ns
        XintfRegs.XTIMING0.bit.XWRACTIVE = 0x1;//1 //26ns
        XintfRegs.XTIMING0.bit.XWRTRAIL  = 0x2;//2 //52ns

        // scale 1:2
        XintfRegs.XTIMING0.bit.X2TIMING = 0x1;
        EDIS;


#if USE_EXT_RAM == 1
        EALLOW;
        // setup ZONE7
        // 16-bit wide interface
        XintfRegs.XTIMING7.bit.XSIZE = 0x3;

        // do not use READY
        XintfRegs.XTIMING7.bit.USEREADY = 0x0;
        XintfRegs.XTIMING7.bit.READYMODE = 0x0;

        // XINTF read timing
        XintfRegs.XTIMING7.bit.XRDLEAD   = 0x1;
        XintfRegs.XTIMING7.bit.XRDACTIVE = 0x1;
        XintfRegs.XTIMING7.bit.XRDTRAIL  = 0x1;

        // XINTF write timing
        XintfRegs.XTIMING7.bit.XWRLEAD   = 0x1;
        XintfRegs.XTIMING7.bit.XWRACTIVE = 0x1;
        XintfRegs.XTIMING7.bit.XWRTRAIL  = 0x1;

        // scale 1:1
        XintfRegs.XTIMING7.bit.X2TIMING = 0x0;
        EDIS;
#endif
        EALLOW;
        // XTIMCLK=SYSCLKOUT =  when 0 or 75MHz when 1
        XintfRegs.XINTCNF2.bit.XTIMCLK = 0x1; // 75MHz
        // tune output clock to be:
        // 1/2 of XTIMCLK when 1 or 1/1 when 0
        // 26.6ns is one unit
        XintfRegs.XINTCNF2.bit.CLKMODE = 0x1; // 37.5MHz

        EDIS;
        // wait until all configuration passes pipeline
        asm(" RPT #7 || NOP");

#if FORCE_PCB_REV != 0
        mlc_pcb_rev = FORCE_PCB_REV;
#else
        // read PCB revision (stored in CPLD firmware)
        MLC_info_struct.pcb_hw_ver = MLC_READ(READ_PCB_REV);
#endif

        // read firmware revision of CPLD
        MLC_info_struct.cpld_fw_ver = MLC_READ(READ_VER);
        // and FPGA
        MLC_info_struct.fpga_fw_ver = MLC_READ(READ_FPGA_VER);

#if ALLOW_XINTF_SPEEDUP == 1

        // check if we can enable speedup, depends on PCB revision and firmware
        if ((MLC_info_struct.pcb_hw_ver > PCB_REV_1) && (MLC_info_struct.cpld_fw_ver > 3)){
                DBG_INFO_PUTS("XINTF is set to higher speed.");
                // 13 ns cycle granularity
                EALLOW;
                // XINTF read timing
                XintfRegs.XTIMING0.bit.XRDLEAD   = 0x1; //13ns 
                XintfRegs.XTIMING0.bit.XRDACTIVE = 0x5; //65ns
                XintfRegs.XTIMING0.bit.XRDTRAIL  = 0x0; //0ns -- not valid ?

                // XINTF write timing
                XintfRegs.XTIMING0.bit.XWRLEAD   = 0x1; //13ns
                XintfRegs.XTIMING0.bit.XWRACTIVE = 0x2; //26ns
                XintfRegs.XTIMING0.bit.XWRTRAIL  = 0x3; //39ns

                // scale 1:1
                XintfRegs.XTIMING0.bit.X2TIMING = 0x0;
                EDIS;
                // wait untill all config pass pipeline
                asm(" RPT #7 || NOP");
        } else {
                //DBG_INFO_PUTS("Can not setup XINTF to higher speed, FW of CPLD does not allow this. Upgrade to version 4 or higher.");
        }
#endif


        // CONVSTC
        // check PCB revison
        if (MLC_info_struct.pcb_hw_ver > PCB_REV_1){
                EALLOW;
                GpioCtrlRegs.GPBMUX2.bit.GPIO61= 0x0;
                GpioCtrlRegs.GPBDIR.bit.GPIO61 = 0x1;
                GpioDataRegs.GPBSET.bit.GPIO61 = 0x1;
                EDIS;
        }

        // revision 3 of FW has global enable
        if (MLC_info_struct.cpld_fw_ver > 2){
                EALLOW;
                GpioCtrlRegs.GPBMUX2.bit.GPIO60 = 0x0;
                GpioCtrlRegs.GPBDIR.bit.GPIO60 = 0x1;
                GpioDataRegs.GPBSET.bit.GPIO60 = 0x1;
                EDIS;
        }

//#if USE_DMA == 1

        // run even if debug request halt
        //DmaRegs.DEBUGCTRL.bit.FREE = 1;


        EALLOW;
        // disable DMA for CH1
        DmaRegs.CH1.CONTROL.bit.RUN = 0;
        // disable DMA for CH2
        DmaRegs.CH2.CONTROL.bit.RUN = 0;
        // disable DMA for CH3
        DmaRegs.CH3.CONTROL.bit.RUN = 0;
        EDIS;

#if USE_ADC_DMA == 1
        EALLOW;
        // allow DMA
        DmaRegs.CH1.CONTROL.bit.RUN = 1;
        // allow interrupt
        DmaRegs.CH1.MODE.bit.CHINTE = 1;
        // data size 16b
        DmaRegs.CH1.MODE.bit.DATASIZE = 0;
        // set to continuous mode - after transfer DMA is reset and wait
        // for another interrupt event
        DmaRegs.CH1.MODE.bit.CONTINUOUS = 1;
        // generate interrupt when transfer done
        DmaRegs.CH1.MODE.bit.CHINTMODE = 1;
        // enable start of DMA from interrupt
        //DmaRegs.CH1.MODE.bit.PERINTE = 1;
        // select proper interrupt source for start of transfer
        // in our case it is XINT1 which is connected to BUSY of ADC
        DmaRegs.CH1.MODE.bit.PERINTSEL = 3;
        // burst setup - 16 words
        DmaRegs.CH1.BURST_SIZE.bit.BURSTSIZE = 15;
        // burst step source - no address change
        DmaRegs.CH1.SRC_BURST_STEP = 0;
        // burst step destination - add 1 to address
        DmaRegs.CH1.DST_BURST_STEP = 1;
        // transfer size - one burst
        DmaRegs.CH1.TRANSFER_SIZE = 0;
        // begin address
        DmaRegs.CH1.SRC_ADDR_SHADOW = BASE_ADDRESS + READ_AD1;
        // dest address
        DmaRegs.CH1.DST_ADDR_SHADOW = (Uint32)AD_dma_res_1;
        // setup isr handler
        //MLC_enable_DMA_isr(AD_CH1, dma_transfer_end);
        // clear all flags
        DmaRegs.CH1.CONTROL.bit.ERRCLR = 1;
        DmaRegs.CH1.CONTROL.bit.SYNCCLR = 1;
        DmaRegs.CH1.CONTROL.bit.PERINTCLR = 1;

        // allow DMA
        DmaRegs.CH2.CONTROL.bit.RUN = 1;
        // allow interrupt
        DmaRegs.CH2.MODE.bit.CHINTE = 1;
        // data size 16b
        DmaRegs.CH2.MODE.bit.DATASIZE = 0;
        // set to continuous mode - after transfer DMA is reset and wait
        // for another interrupt event
        DmaRegs.CH2.MODE.bit.CONTINUOUS = 1;
    // allow interrupt when done only when other channels are disabled
        // generate interrupt when transfer done
        DmaRegs.CH2.MODE.bit.CHINTMODE = 1;
        // enable start of DMA from interrupt
        //DmaRegs.CH2.MODE.bit.PERINTE = 1;
        // select proper interrupt source for start of transfer
        // in our case it is XINT1
        DmaRegs.CH2.MODE.bit.PERINTSEL = 3;
        // burst setup - 16 words
        DmaRegs.CH2.BURST_SIZE.bit.BURSTSIZE = 15;
        // burst step source - no address change
        DmaRegs.CH2.SRC_BURST_STEP = 0;
        // burst step destination - add 1 to address
        DmaRegs.CH2.DST_BURST_STEP = 1;
        // transfer size - one burst
        DmaRegs.CH2.TRANSFER_SIZE = 0;
        // begin address
        DmaRegs.CH2.SRC_ADDR_SHADOW = BASE_ADDRESS + READ_AD2;
        // dest address
        DmaRegs.CH2.DST_ADDR_SHADOW = (Uint32)AD_dma_res_2;
        // setup isr handler
        //MLC_enable_DMA_isr(AD_CH2, dma_transfer_end);

        // clear all flags
        DmaRegs.CH2.CONTROL.bit.ERRCLR = 1;
        DmaRegs.CH2.CONTROL.bit.SYNCCLR = 1;
        DmaRegs.CH2.CONTROL.bit.PERINTCLR = 1;

        // allow DMA
        DmaRegs.CH3.CONTROL.bit.RUN = 1;
        // allow interrupt
        DmaRegs.CH3.MODE.bit.CHINTE = 1;
        // data size 16b
        DmaRegs.CH3.MODE.bit.DATASIZE = 0;
        // set to continuous mode - after transfer DMA is reset and wait
        // for another interrupt event
        DmaRegs.CH3.MODE.bit.CONTINUOUS = 1;
        // generate interrupt when transfer done
        DmaRegs.CH3.MODE.bit.CHINTMODE = 1;
        // enable start of DMA from interrupt
        //DmaRegs.CH3.MODE.bit.PERINTE = 1;
        // select proper interrupt source for start of transfer
        // in our case it is XINT1
        DmaRegs.CH3.MODE.bit.PERINTSEL = 3;
        // burst setup - 16 words
        DmaRegs.CH3.BURST_SIZE.bit.BURSTSIZE = 15;
        // burst step source - no address change
        DmaRegs.CH3.SRC_BURST_STEP = 0;
        // burst step destination - add 1 to address
        DmaRegs.CH3.DST_BURST_STEP = 1;
        // transfer size - one burst
        DmaRegs.CH3.TRANSFER_SIZE = 0;
        // begin address
        DmaRegs.CH3.SRC_ADDR_SHADOW = BASE_ADDRESS + READ_AD3;
        // dest address
        DmaRegs.CH3.DST_ADDR_SHADOW = (Uint32)AD_dma_res_3;
        // setup default isr handler
        //MLC_enable_DMA_isr(AD_CH3, dma_transfer_end);
        // clear all flags
        DmaRegs.CH3.CONTROL.bit.ERRCLR = 1;
        DmaRegs.CH3.CONTROL.bit.SYNCCLR = 1;
        DmaRegs.CH3.CONTROL.bit.PERINTCLR = 1;
        EDIS;
#endif
#endif
}

/*
 * F2812 init routine
 */

void MLC_init_F2812(void){
#if MCU_TYPE == MCU_TYPE_TMS320F2812
        EALLOW;
        // configure pins for AD converter - outputs
        // CONVSTA
        GpioMuxRegs.GPDMUX.bit.T2CTRIP_SOCA_GPIOD1 = 0x0;
        GpioMuxRegs.GPDDIR.bit.GPIOD1 = 0x1;
        // CONVSTB
        GpioMuxRegs.GPDMUX.bit.T4CTRIP_SOCB_GPIOD6 = 0x0;
        GpioMuxRegs.GPDDIR.bit.GPIOD6 = 0x1;

        // prepare first conversion - goto idle state
        GpioDataRegs.GPDSET.bit.GPIOD1 = 0x1;
        GpioDataRegs.GPDSET.bit.GPIOD6 = 0x1;

        // AD busy - input
        GpioMuxRegs.GPEMUX.bit.XNMI_XINT13_GPIOE2 = 0x0;
        GpioMuxRegs.GPEDIR.bit.GPIOE2 = 0x0;

        // FRST data - input --UNSUPORTED ! in rev. 1
        GpioMuxRegs.GPFMUX.bit.MDXA_GPIOF12 = 0x0;
        GpioMuxRegs.GPFDIR.bit.GPIOF12  = 0x0;

        // Buttons
        GpioMuxRegs.GPFMUX.bit.MCLKXA_GPIOF8 = 0x0;
        GpioMuxRegs.GPFDIR.bit.GPIOF8  = 0x0;
        GpioMuxRegs.GPFMUX.bit.MCLKRA_GPIOF9 = 0x0;
        GpioMuxRegs.GPFDIR.bit.GPIOF9  = 0x0;
        GpioMuxRegs.GPFMUX.bit.MFSRA_GPIOF11 = 0x0;
        GpioMuxRegs.GPFDIR.bit.GPIOF11  = 0x0;
        GpioMuxRegs.GPFMUX.bit.MFSXA_GPIOF10 = 0x0;
        GpioMuxRegs.GPFDIR.bit.GPIOF10  = 0x0;



        // IRC input 50,51,53 EQEP1
        GpioMuxRegs.GPAMUX.bit.CAP1Q1_GPIOA8 = 0x1;
        GpioMuxRegs.GPAMUX.bit.CAP2Q2_GPIOA9 = 0x1;
        GpioMuxRegs.GPAMUX.bit.CAP3QI1_GPIOA10 = 0x1;

        EDIS;
        /*
                ---------|___________|----------

                <XRDLEAD> <XRDACTIVE> <XRDTRAIL>

                <           adresa             >
                ------------------<data>--------
        */
                EALLOW;
                // 16-bit data bus wide interface
                XintfRegs.XTIMING1.bit.XSIZE = 0x3;

                // do not use READY
                XintfRegs.XTIMING1.bit.USEREADY = 0x0;
                XintfRegs.XTIMING0.bit.READYMODE = 0x0;

                // XINTF read timing
                XintfRegs.XTIMING1.bit.XRDLEAD   = 0x1;//1
                XintfRegs.XTIMING1.bit.XRDACTIVE = 0x3;//3
                XintfRegs.XTIMING1.bit.XRDTRAIL  = 0x0;//0

                // XINTF write timing
                XintfRegs.XTIMING1.bit.XWRLEAD   = 0x1;//1
                XintfRegs.XTIMING1.bit.XWRACTIVE = 0x2;//1
                XintfRegs.XTIMING1.bit.XWRTRAIL  = 0x1;//2

                // scale 1:2
                XintfRegs.XTIMING1.bit.X2TIMING = 0x1;
                EDIS;


        #if USE_EXT_RAM == 1
                EALLOW;
                // setup ZONE7
                // 16-bit wide interface
                XintfRegs.XTIMING7.bit.XSIZE = 0x3;

                // do not use READY
                XintfRegs.XTIMING7.bit.USEREADY = 0x0;
                XintfRegs.XTIMING7.bit.READYMODE = 0x0;

                // XINTF read timing
                XintfRegs.XTIMING7.bit.XRDLEAD   = 0x1;
                XintfRegs.XTIMING7.bit.XRDACTIVE = 0x1;
                XintfRegs.XTIMING7.bit.XRDTRAIL  = 0x1;

                // XINTF write timing
                XintfRegs.XTIMING7.bit.XWRLEAD   = 0x1;
                XintfRegs.XTIMING7.bit.XWRACTIVE = 0x1;
                XintfRegs.XTIMING7.bit.XWRTRAIL  = 0x1;

                // scale 1:1
                XintfRegs.XTIMING7.bit.X2TIMING = 0x0;
                EDIS;
        #endif
                EALLOW;
                // XTIMCLK=SYSCLKOUT =  when 0 or 75MHz when 1
                XintfRegs.XINTCNF2.bit.XTIMCLK = 0x1; // 75MHz
                // tune output clock to be:
                // 1/2 of XTIMCLK when 1 or 1/1 when 0
                XintfRegs.XINTCNF2.bit.CLKMODE = 0x1; // 37.5MHz

                EDIS;
                // wait until all configuration passes pipeline
                asm(" RPT #7 || NOP");

        #if FORCE_PCB_REV != 0
                mlc_pcb_rev = FORCE_PCB_REV;
        #else
                // read PCB revision (stored in CPLD firmware)
                MLC_info_struct.pcb_hw_ver = MLC_READ(READ_PCB_REV);
        #endif

                // read firmware revision of CPLD
                MLC_info_struct.cpld_fw_ver = MLC_READ(READ_VER);
                // and FPGA
                MLC_info_struct.fpga_fw_ver = MLC_READ(READ_FPGA_VER);

        #if ALLOW_XINTF_SPEEDUP == 1

                // check if we can enable speedup, depends on PCB revision and firmware
                if ((mlc_pcb_rev > PCB_REV_1) && (mlc_fw_rev > 3)){
                        DBG_INFO_PUTS("XINTF is set to higher speed.");
                        EALLOW;
                        // XINTF read timing
                        XintfRegs.XTIMING1.bit.XRDLEAD   = 0x1;
                        XintfRegs.XTIMING1.bit.XRDACTIVE = 0x5;
                        XintfRegs.XTIMING1.bit.XRDTRAIL  = 0x0;

                        // XINTF write timing
                        XintfRegs.XTIMING1.bit.XWRLEAD   = 0x1;
                        XintfRegs.XTIMING1.bit.XWRACTIVE = 0x2;
                        XintfRegs.XTIMING1.bit.XWRTRAIL  = 0x3;

                        // scale 1:1
                        XintfRegs.XTIMING1.bit.X2TIMING = 0x0;
                        EDIS;
                        // wait untill all config pass pipeline
                        asm(" RPT #7 || NOP");
                } else {
                        DBG_INFO_PUTS("Can not setup XINTF to higher speed, FW of CPLD does not allow this. Upgrade to version 4 or higher.");
                }
        #endif

        // CONVSTC
        // check PCB revison
        if (MLC_info_struct.pcb_hw_ver > PCB_REV_1){
                EALLOW;
                GpioMuxRegs.GPAMUX.bit.TCLKINA_GPIOA12 = 0x0;
                GpioMuxRegs.GPADIR.bit.GPIOA12 = 0x1;
                GpioDataRegs.GPASET.bit.GPIOA12 = 0x1;
                EDIS;
        }

        // revision 3 of FW has global enable
        if (MLC_info_struct.cpld_fw_ver > 2){
                EALLOW;
                GpioMuxRegs.GPAMUX.bit.TDIRA_GPIOA11 = 0x0;
                GpioMuxRegs.GPADIR.bit.GPIOA11 = 0x1;
                GpioDataRegs.GPASET.bit.GPIOA11 = 0x1;
                EDIS;
        }
#endif
}

/*
 * LS3137 init routine
 */

void MLC_init_LS3137(void){
#if MCU_TYPE == MCU_TYPE_TMS570LS3137
        systemInit(); // init system, including pinmux, PLL etc.
        systemREG1->GPREG1 |= 0x80000000; // this must be there for proper function of EMIF, see SPNU499B p. 158
        emif_ASYNC1Init(); // setup peripherals EMIF
        emif_ASYNC2Init(); // setup ext. RAM EMIF

        // read firmware revision of CPLD
        MLC_info_struct.cpld_fw_ver = MLC_READ(READ_VER);
        // and FPGA
        MLC_info_struct.fpga_fw_ver = MLC_READ(READ_FPGA_VER);


        gioInit(); //setup GIOA/GIOB

        // init default GPIOA5 handler - conv end
        adc_convend_handler = isr_conv_end;
        // setup VIM
        vimInit();
        // GIO will trigger gio_isr_handler
        vimChannelMap(9,9, &gio_isr_handler);

        // DMA setup
        dmaEnable();            // enable DMA controller
        dmaReqAssign(0,1); //channel 0
        dmaReqAssign(1,2); //channel 1
        dmaReqAssign(2,3); //channel 2

        // setup CH0 - ADC1
        dmaConfigCtrlPacket((uint32_t)((uint16_t*)BASE_ADDRESS+READ_AD1), (uint32_t)AD_res_1, 16);
        dmaSetCtrlPacket(DMA_CH0, g_dmaCTRLPKT);

        // setup CH1 - ADC2
        dmaConfigCtrlPacket((uint32_t)((uint16_t*)BASE_ADDRESS+READ_AD2), (uint32_t)AD_res_2, 16);
        dmaSetCtrlPacket(DMA_CH1, g_dmaCTRLPKT);

        // setup CH2 - ADC3
        dmaConfigCtrlPacket((uint32_t)((uint16_t*)BASE_ADDRESS+READ_AD3), (uint32_t)AD_res_3, 16);
        dmaSetCtrlPacket(DMA_CH2, g_dmaCTRLPKT);
#endif
}

// basic multiplatform init
void MLC_init(void)
{
#if MCU_TYPE == MCU_TYPE_TMS320F28335
        MLC_init_F28335();
#endif

#if MCU_TYPE == MCU_TYPE_TMS320F2812
        MLC_init_F2812();
#endif

#if MCU_TYPE == MCU_TYPE_TMS570LS3137
        MLC_init_LS3137();
#endif

        // setup ADC
        MLC_ADC_reset();
        MLC_ADC_setup(AD_OS0, AD_OS0, AD_OS0, AD_RNG_5V, AD_RNG_5V, AD_RNG_5V);
        MLC_ADC_setup_SOC(AD_SOC_ALL_DEFAULT);

        // test for ext module
        MLC_WRITE(RW_EXT_LED_REG, 0xAAAA);
        if (MLC_READ(RW_EXT_LED_REG) == 0xAAAA){
          MLC_info_struct.mod_fw_ver = MLC_READ(READ_EXT_VER);
        } else {
          MLC_info_struct.mod_fw_ver = 0x00;
          DBG_INFO_PUTS("External module is not present.");
        }

}


void MLC_global_enable(){
        if (MLC_info_struct.cpld_fw_ver > 2){
#if MCU_TYPE == MCU_TYPE_TMS320F28335
                GpioDataRegs.GPBCLEAR.bit.GPIO60 = 0x1;
#endif

#if MCU_TYPE == MCU_TYPE_TMS320F2812
                GpioDataRegs.GPACLEAR.bit.GPIOA11 = 0x1;
#endif

#if MCU_TYPE == MCU_TYPE_TMS570LS3137
                // clear global enable
                gioSetBit(gioPORTA, 1, 0);
#endif
        }
}

void MLC_global_disable(){
        if (MLC_info_struct.cpld_fw_ver > 2){
#if MCU_TYPE == MCU_TYPE_TMS320F28335
                GpioDataRegs.GPBSET.bit.GPIO60 = 0x1;
#endif

#if MCU_TYPE == MCU_TYPE_TMS320F2812
                GpioDataRegs.GPASET.bit.GPIOA11 = 0x1;
#endif

#if MCU_TYPE == MCU_TYPE_TMS570LS3137
                // clear global enable
                gioSetBit(gioPORTA, 1, 1);
#endif
        }
}

// TMS320F2812 does not support DMA transfers
#if MCU_TYPE == MCU_TYPE_TMS320F28335 || MCU_TYPE == MCU_TYPE_TMS570LS3137
uint16_t MLC_DMA_active(){
#if MCU_TYPE == MCU_TYPE_TMS320F28335
        return DmaRegs.PRIORITYSTAT.bit.ACTIVESTS;
#endif

#if MCU_TYPE == MCU_TYPE_TMS570LS3137 //TODO: Implement DMA transfer progress function
        return 0;
#endif
}

void MLC_DMA_activate(){
#if MCU_TYPE == MCU_TYPE_TMS320F28335

        EALLOW;
        // enable start of DMA from ADC EOC interrupt
        DmaRegs.CH1.MODE.bit.PERINTE = 1;
        DmaRegs.CH2.MODE.bit.PERINTE = 1;
        DmaRegs.CH3.MODE.bit.PERINTE = 1;
        EDIS;
#endif

#if MCU_TYPE == MCU_TYPE_TMS570LS3137 //TODO: Implement activation of ADC DMA
#endif
}

void MLC_DMA_deactivate(){
#if MCU_TYPE == MCU_TYPE_TMS320F28335
        EALLOW;
        // enable start of DMA from ADC EOC interrupt
        DmaRegs.CH1.MODE.bit.PERINTE = 0;
        DmaRegs.CH2.MODE.bit.PERINTE = 0;
        DmaRegs.CH3.MODE.bit.PERINTE = 0;
        EDIS;
#endif

#if MCU_TYPE == MCU_TYPE_TMS570LS3137 //TODO: Implement deactivation of ADC DMA
#endif
}

#endif

void MLC_DMA_enable_isr(uint16_t channel, interrupt void* handler){
#if MCU_TYPE == MCU_TYPE_TMS320F28335
        DINT;
        EALLOW;
        //make sure that PIE has power
        PieCtrlRegs.PIECTRL.bit.ENPIE = 1;
        // enable group 7 - DMA interrupt
        IER |= M_INT7;
        switch (channel) {
                case AD_CH1:
                        // CH1 uses .1
                        PieCtrlRegs.PIEIER7.bit.INTx1 = 0x1;
                        PieVectTable.DINTCH1 = handler;
                        break;
                case AD_CH2:
                        // CH2 uses .2
                        PieCtrlRegs.PIEIER7.bit.INTx2 = 0x1;
                        PieVectTable.DINTCH2 = handler;
                        break;
                case AD_CH3:
                        // CH3 uses .3
                        PieCtrlRegs.PIEIER7.bit.INTx3 = 0x1;
                        PieVectTable.DINTCH3 = handler;
                        break;
                default:
                        break;
        }
        EDIS;
        EINT;
#endif

// TODO: implement MLC_DMA_enable_isr
#if MCU_TYPE == MCU_TYPE_TMS570LS3137
        dmaEnable();            // enable DMA controller
        dmaReqAssign(0,1); //channel 0
        dmaConfigCtrlPacket((uint32_t)(BASE_ADDRESS + READ_AD1), (uint32_t)&AD_dma_res_1, 16);
        dmaSetChEnable(DMA_CH0, DMA_SW);
#endif
}

void MLC_DMA_disable_isr(uint16_t channel){

// TODO: implement MLC_DMA_disable_isr
#if MCU_TYPE == MCU_TYPE_TMS570LS3137
#endif

#if MCU_TYPE == MCU_TYPE_TMS320F28335
        DINT;
        EALLOW;
        //make sure that PIE has power
        PieCtrlRegs.PIECTRL.bit.ENPIE = 1;
        // enable group 7 - DMA interrupt
        //IER |= M_INT7;
        switch (channel) {
                case DMA_ADCH1:
                        // CH1 uses .1
                        PieCtrlRegs.PIEIER7.bit.INTx1 = 0x0;
                        break;
                case DMA_ADCH2:
                        // CH2 uses .2
                        PieCtrlRegs.PIEIER7.bit.INTx2 = 0x0;
                        break;
                case DMA_ADCH3:
                        // CH3 uses .3
                        PieCtrlRegs.PIEIER7.bit.INTx3 = 0x0;
                        break;
                default:
                        break;
        }
        EDIS;
        EINT;
#endif
}
//#endif // DMA functions exclusion end

// setup non-default interrupt handler
void MLC_ADC_enable_isr(interrupt void* handler){

#if MCU_TYPE == MCU_TYPE_TMS320F28335
        DINT;
        EALLOW;
        //make sure that PIE has power
        PieCtrlRegs.PIECTRL.bit.ENPIE = 1;
        // enable INT1.4 - XINT1
        IER |= M_INT1;
        PieCtrlRegs.PIEIER1.bit.INTx4 = 0x1;
        // enable pin 25
        GpioIntRegs.GPIOXINT1SEL.bit.GPIOSEL = 25;
        // use default handler if user passes null pointer
        if (handler == NULL){
                PieVectTable.XINT1 = isr_conv_end;
        } else {
                PieVectTable.XINT1 = handler;
        }
        // Configure XINT1
    XIntruptRegs.XINT1CR.bit.POLARITY = 0;      // Falling edge interrupt
    XIntruptRegs.XINT1CR.bit.ENABLE = 1;        // Enable Xint1
        EDIS;
        EINT;
#endif

#if MCU_TYPE == MCU_TYPE_TMS320F2812
#endif

#if MCU_TYPE == MCU_TYPE_TMS570LS3137 //TODO: Implement ADC convert ISR
        gioEnableNotification(gioPORTA, 5);
#endif

}

// disable XINT1
void MLC_ADC_disable_isr(void){
#if MCU_TYPE ==  MCU_TYPE_TMS320F28335
        DINT;
        EALLOW;
        PieCtrlRegs.PIEIER1.bit.INTx4 = 0x0;
        EDIS;
        EINT;
#endif

#if MCU_TYPE == MCU_TYPE_TMS320F2812
#endif

//TODO: Implement disabling of ADC convend
#if MCU_TYPE == MCU_TYPE_TMS570LS3137
#endif
}

// resets AD converters
void MLC_ADC_reset(void){
        unsigned int i;
        // clear results
        for (i=0;i<AD_LEN;i++){
                AD_res_1[i] = 0;
                AD_res_2[i] = 0;
                AD_res_3[i] = 0;
        }
        // clear also DMA buffers
        for (i=0;i<16;i++){
                AD_dma_res_1[i] = 0;
                AD_dma_res_2[i] = 0;
                AD_dma_res_3[i] = 0;
        }
        // reset ADs
        MLC_WRITE(WRITE_SETRES_AD, 0x0000);
        DELAY_US(10);
        // release reset
        MLC_WRITE(WRITE_CLRRES_AD, 0x0000);
        DELAY_US(10);
}

//
void MLC_ADC_start_conv(void){
#if MCU_TYPE == MCU_TYPE_TMS320F28335
        // start all converters
        GpioDataRegs.GPBCLEAR.bit.GPIO32 = 0x1;
        GpioDataRegs.GPBCLEAR.bit.GPIO33 = 0x1;
        if (MLC_info_struct.pcb_hw_ver != PCB_REV_1){
                GpioDataRegs.GPBCLEAR.bit.GPIO61 = 0x1;
        }
        DELAY_US(0.1);
        GpioDataRegs.GPBSET.bit.GPIO32 = 0x1;
        GpioDataRegs.GPBSET.bit.GPIO33 = 0x1;
        if (MLC_info_struct.pcb_hw_ver != PCB_REV_1){
                GpioDataRegs.GPBSET.bit.GPIO61 = 0x1;
        }
#endif

#if MCU_TYPE == MCU_TYPE_TMS320F2812
        // start all converters
        GpioDataRegs.GPDCLEAR.bit.GPIOD1 = 0x1;
        GpioDataRegs.GPDCLEAR.bit.GPIOD6 = 0x1;
        if (MLC_info_struct.pcb_hw_ver != PCB_REV_1){
                GpioDataRegs.GPACLEAR.bit.GPIOA12 = 0x1;
        }
        DELAY_US(0.1);
        GpioDataRegs.GPDSET.bit.GPIOD1 = 0x1;
        GpioDataRegs.GPDSET.bit.GPIOD6 = 0x1;
        if (MLC_info_struct.pcb_hw_ver != PCB_REV_1){
                GpioDataRegs.GPASET.bit.GPIOA12 = 0x1;
        }
#endif

#if MCU_TYPE == MCU_TYPE_TMS570LS3137
        hetREG1->DCLR = (PIN_STARTCONVA | PIN_STARTCONVB | PIN_STARTCONVC);
        DELAY_US(0.1);
        hetREG1->DSET = (PIN_STARTCONVA | PIN_STARTCONVB | PIN_STARTCONVC);
#endif
}

void MLC_ADC_start_one_conv(uint16_t channel){
#if MCU_TYPE == MCU_TYPE_TMS320F28335
        switch(channel){
        case AD_CH1:
                GpioDataRegs.GPBCLEAR.bit.GPIO32 = 0x1;
                DELAY_US(0.1);
                GpioDataRegs.GPBSET.bit.GPIO32 = 0x1;
                break;
        case AD_CH2:
                GpioDataRegs.GPBCLEAR.bit.GPIO33 = 0x1;
                DELAY_US(0.1);
                GpioDataRegs.GPBSET.bit.GPIO33 = 0x1;
                break;
        case AD_CH3:
                if (MLC_info_struct.pcb_hw_ver != PCB_REV_1){
                        GpioDataRegs.GPBCLEAR.bit.GPIO61 = 0x1;
                        DELAY_US(0.1);
                        GpioDataRegs.GPBSET.bit.GPIO61 = 0x1;
                }
                break;
        }
#endif

#if MCU_TYPE == MCU_TYPE_TMS320F2812
        switch(channel){
        case AD_CH1:
                GpioDataRegs.GPDCLEAR.bit.GPIOD1 = 0x1;
                DELAY_US(0.1);
                GpioDataRegs.GPDSET.bit.GPIOD1 = 0x1;
                break;
        case AD_CH2:
                GpioDataRegs.GPDCLEAR.bit.GPIOD6 = 0x1;
                DELAY_US(0.1);
                GpioDataRegs.GPDSET.bit.GPIOD6 = 0x1;
                break;
        case AD_CH3:
                if (MLC_info_struct.pcb_hw_ver != PCB_REV_1){
                        GpioDataRegs.GPACLEAR.bit.GPIOA12 = 0x1;
                        DELAY_US(0.1);
                        GpioDataRegs.GPASET.bit.GPIOA12 = 0x1;
                }
                break;
        }
#endif

#if MCU_TYPE == MCU_TYPE_TMS570LS3137
        switch(channel){
        case AD_CH1:
                hetREG1->DCLR = PIN_STARTCONVA;
                DELAY_US(0.1);
                hetREG1->DSET = PIN_STARTCONVA;
                break;
        case AD_CH2:
                hetREG1->DCLR = PIN_STARTCONVB;
                DELAY_US(0.1);
                hetREG1->DSET = PIN_STARTCONVB;
                break;
        case AD_CH3:
                if (MLC_info_struct.pcb_hw_ver != PCB_REV_1){
                        hetREG1->DCLR = PIN_STARTCONVC;
                        DELAY_US(0.1);
                        hetREG1->DSET = PIN_STARTCONVC;
                }
                break;
        }
#endif
}

//
void MLC_ADC_setup(unsigned int os_1, unsigned int os_2, unsigned int os_3, unsigned int rng_1, unsigned int rng_2, unsigned int rng_3){
        unsigned int old_conf;
#if MCU_TYPE == MCU_TYPE_TMS320F28335
        // disable interrupt
        old_conf = PieCtrlRegs.PIEIER1.bit.INTx4;
        PieCtrlRegs.PIEIER1.bit.INTx4 = 0x0;

        // write configuration, i.e. sets pins through CPLD
        ad_conf = (os_1 | (os_2 << 3) | (os_3 << 6) | (rng_1 << 9) | (rng_2 << 10) | (rng_3 << 11)) | ad_soc_conf;
        MLC_WRITE(WRITE_AD_CONF, ad_conf);
        // we must wait for changes are accepted by A/D
        DELAY_US(200);
        // restore interrupt
        PieCtrlRegs.PIEIER1.bit.INTx4 = old_conf;
        // enable AD interrupt
        //MLC_ADC_enable_isr(NULL);
#endif

#if MCU_TYPE == MCU_TYPE_TMS320F2812
        // disable interrupt
        //old_conf = PieCtrlRegs.PIEIER1.bit.INTx4;
        //PieCtrlRegs.PIEIER1.bit.INTx4 = 0x0;

        // TODO: 2812: implement ISR support

        // write configuration, i.e. sets pins through CPLD
        ad_conf = (os_1 | (os_2 << 3) | (os_3 << 6) | (rng_1 << 9) | (rng_2 << 10) | (rng_3 << 11)) | ad_soc_conf;
        MLC_WRITE(WRITE_AD_CONF, ad_conf);
        // we must wait for changes are accepted by A/D
        DELAY_US(200);
        // restore interrupt
        //PieCtrlRegs.PIEIER1.bit.INTx4 = old_conf;
        // enable AD interrupt
        MLC_ADC_enable_isr(NULL);
#endif

#if MCU_TYPE == MCU_TYPE_TMS570LS3137
        // write configuration, i.e. sets pins through CPLD
        ad_conf = (os_1 | (os_2 << 3) | (os_3 << 6) | (rng_1 << 9) | (rng_2 << 10) | (rng_3 << 11)) | ad_soc_conf;
        MLC_WRITE(WRITE_AD_CONF, ad_conf);
        // we must wait for changes are accepted by A/D
        DELAY_US(200);
        // enable AD interrupt
        MLC_ADC_enable_isr(NULL);
#endif
}

// wait for busy
unsigned int MLC_ADC_wait(void){
        unsigned int timeout = 0;
#if MCU_TYPE == MCU_TYPE_TMS320F28335
        while (GpioDataRegs.GPADAT.bit.GPIO25 == 0x1) timeout++;
#endif

#if MCU_TYPE == MCU_TYPE_TMS320F2812
        while (GpioDataRegs.GPEDAT.bit.GPIOE2 == 0x1) timeout++;
#endif

#if MCU_TYPE == MCU_TYPE_TMS570LS3137
        while (gioGetBit(gioPORTA, 5) == 0x1) timeout++;
#endif
        return timeout;
}

/*
 * MLC_ADC_read has two different implementations, one for TMS570LS3137 which utilizes SW triggered DMA and TMS320Fxxxx version with direct readings
 */

volatile int16_t* MLC_ADC_read(volatile int16_t* ad_res, uint16_t ad_addr){

#if QUICK_READ == 0
        unsigned int i;
#endif

#if USE_FRSTDATA == 1
        // wait for FRST data
        ad_res[0] = MLC_READ(ad_addr);

#if MCU_TYPE == MCU_TYPE_TMS320F28335
        while (GpioDataRegs.GPBDAT.bit.GPIO35 == 0x0){
#endif
#if MCU_TYPE == MCU_TYPE_TMS320F2812
        while (GpioDataRegs.GPFDAT.bit.GPIOF12 == 0x0){
#endif
#if MCU_TYPE == MCU_TYPE_TMS570LS3137
        while (gioGetBit(gioPORTB, 7) == 0x0)
                {
#endif
                ad_res[0] = MLC_READ(ad_addr);
                }
        ad_res[1] = MLC_READ(ad_addr);
#elif MCU_TYPE != MCU_TYPE_TMS570LS3137
        ad_res[0] = MLC_READ(ad_addr);
        ad_res[1] = MLC_READ(ad_addr);
        //DELAY_US(1);
#endif

/*
 * Do not correct sign of CH1 of ADCs when using PCBv1.
 * This behavior provides same results with DMA transfer and "hand" transfers
 * of ADC data.
 */

#if QUICK_READ == 0
        for (i=2;i<16;i++){
                // correct bad sign in revision 0.1 of PCB
                //if ((i==2) && (mlc_pcb_rev == PCB_REV_1))
                //      (ad_res)[i] = -1*MLC_READ(ad_addr);
                //else
                        (ad_res)[i] = MLC_READ(ad_addr);
                //temp = MLC_READ(ad_addr);
        }
#elif MCU_TYPE != MCU_TYPE_TMS570LS3137
//      if (mlc_pcb_rev == PCB_REV_1){
//              ad_res[2] = -MLC_READ(ad_addr);
//              ad_res[3] = -MLC_READ(ad_addr);
//      } else {
        ad_res[2] = MLC_READ(ad_addr);
        ad_res[3] = MLC_READ(ad_addr);
//      }
        ad_res[4] = MLC_READ(ad_addr);
        ad_res[5] = MLC_READ(ad_addr);
        ad_res[6] = MLC_READ(ad_addr);
        ad_res[7] = MLC_READ(ad_addr);
        ad_res[8] = MLC_READ(ad_addr);
        ad_res[9] = MLC_READ(ad_addr);
        ad_res[10] = MLC_READ(ad_addr);
        ad_res[11] = MLC_READ(ad_addr);
        ad_res[12] = MLC_READ(ad_addr);
        ad_res[13] = MLC_READ(ad_addr);
        ad_res[14] = MLC_READ(ad_addr);
        ad_res[15] = MLC_READ(ad_addr);
#endif

#if MCU_TYPE == MCU_TYPE_TMS570LS3137 && QUICK_READ == 1 && USE_FRSTDATA == 0
        // according to address software toggle DMA transfer
        switch (ad_addr) {
                case READ_AD1:
                        dmaSetChEnable(DMA_CH0, DMA_SW);
                        break;
                case READ_AD2:
                        dmaSetChEnable(DMA_CH1, DMA_SW);
                        break;
                case READ_AD3:
                        dmaSetChEnable(DMA_CH2, DMA_SW);
                        break;
                case READ_ADC_ALL:
                        dmaSetChEnable(DMA_CH0, DMA_SW);
                        dmaSetChEnable(DMA_CH1, DMA_SW);
                        dmaSetChEnable(DMA_CH2, DMA_SW);
                        break;
                default:
                        break;
        }
        // wait for transfer finish
        while (dmaREG->SWCHENAS & (1U << DMA_CH0 | 1U << DMA_CH1 | 1U << DMA_CH2)){
                asm("   nop ");
        }
#endif
        return ad_res;
}

// returns pointer to array where are measured values stored
volatile int16_t* MLC_ADC1_get_res_ptr(void){
        return AD_res_1;
}

volatile int16_t* MLC_ADC2_get_res_ptr(void){
        return AD_res_2;
}

volatile int16_t* MLC_ADC3_get_res_ptr(void){
        return AD_res_3;
}

volatile mlc_adc_result* MLC_ADC1_get_res_strptr(void){
  return AD_res_1_struct;
}

volatile mlc_adc_result* MLC_ADC2_get_res_strptr(void){
  return AD_res_2_struct;
}

volatile mlc_adc_result* MLC_ADC3_get_res_strptr(void){
  return AD_res_3_struct;
}

//
volatile int16_t* MLC_ADC1_read(void){
        return MLC_ADC_read(AD_res_1,READ_AD1);
}

//
volatile int16_t* MLC_ADC2_read(void){
        return MLC_ADC_read(AD_res_2,READ_AD2);
}

//
volatile int16_t* MLC_ADC3_read(void){
        return MLC_ADC_read(AD_res_3,READ_AD3);
}

float MLC_ADC_calc_volt(int16_t value, uint16_t range){
        return (float)value*range/16384;
}

void MLC_LCD_write_to(uint16_t pos, char chr)
{
        MLC_WRITE(WRITE_LCD_DISP, (pos<<8) | chr);
}


// writes string to LCD disp
void MLC_LCD_write_str(char* pStr, uint16_t pos){
        char* pTemp;
        unsigned char index = pos;
        pTemp = pStr;
        // parse string
        while (*pTemp){
                MLC_WRITE(WRITE_LCD_DISP, index << 8 | *pTemp++);
                index++;
        }
}

void MLC_LCD_clrscr(void){
        char i;
        for (i=0;i<32;i++){
                MLC_WRITE(WRITE_LCD_DISP, (i<<8) | ' ');
        }
}

void MLC_ADC_setup_SOC(uint16_t adsoc){
        ad_soc_conf = adsoc;
        ad_conf = (ad_conf & 0x0FFF) | adsoc;
        MLC_WRITE(WRITE_AD_CONF, ad_conf);
}

void MLC_DAC_init(void)
{
#if MCU_TYPE == MCU_TYPE_TMS320F28335
        EALLOW;
        // setup pins of SPI
        GpioCtrlRegs.GPBPUD.bit.GPIO54 = 0;
        GpioCtrlRegs.GPBPUD.bit.GPIO56 = 0;
        GpioCtrlRegs.GPBPUD.bit.GPIO57 = 0;

        GpioCtrlRegs.GPBMUX2.bit.GPIO54 = 1;
        GpioCtrlRegs.GPBMUX2.bit.GPIO56 = 1;
        GpioCtrlRegs.GPBMUX2.bit.GPIO57 = 1;

        GpioCtrlRegs.GPBQSEL2.bit.GPIO54 = 3;
        GpioCtrlRegs.GPBQSEL2.bit.GPIO56 = 3;
        GpioCtrlRegs.GPBQSEL2.bit.GPIO57 = 3;

        EDIS;
#endif

#if MCU_TYPE == MCU_TYPE_TMS320F2812
        EALLOW;
        GpioMuxRegs.GPFMUX.bit.SPICLKA_GPIOF2 = 1;
        GpioMuxRegs.GPFMUX.bit.SPISIMOA_GPIOF0 = 1;
        GpioMuxRegs.GPFMUX.bit.SPISTEA_GPIOF3 = 1;
        EDIS;
#endif


#if MCU_TYPE == MCU_TYPE_TMS320F2812 || MCU_TYPE == MCU_TYPE_TMS320F28335
        // Inicializace SPI FIFO (pouziva se pouze TxFIFO)
    SpiaRegs.SPIFFTX.all=0xE040;
    SpiaRegs.SPIFFRX.all=0x405f;        // RXFIFO vypnuto (drzeno v RESET stavu)
    SpiaRegs.SPIFFCT.all=1;                     // zpozdeni zapisu TXFIFO -> SPIDAT ... DAC vyzaduje minimalne 50ns
                                                                        // nutno vyzkouset ... zpozdeni 2 odpovida cca 100ns

        SpiaRegs.SPICCR.bit.SPISWRESET =0;              // zablokovani SPI
        SpiaRegs.SPICTL.all =0x0006;                    // Enable master mode, normal phase,
        SpiaRegs.SPIBRR =0x0;                                   // SPICLK max = LSPCLK/4
    SpiaRegs.SPIPRI.bit.FREE = 1;           // debug udalosti neovlivnuji cinnost SPI
    SpiaRegs.SPICCR.all =0x008F;                    // odblokovani SPI a nastaveni prenosu 16-bit slova
#endif

#if MCU_TYPE == MCU_TYPE_TMS570LS3137
    // setup SPI parameters
    spi2_conf.CSNR = 0; // select CS0
    spi2_conf.CS_HOLD = 0; // no hold of CS
    spi2_conf.DFSEL = 0; // data fomat 0 select
    spi2_conf.WDEL = 0; // no delay
    // init SPI
    spiInit();
#endif
    // reset and setup DACs
    MLC_DAC_reset();

    // preset ADC channels
    dac_sel_ch[DAC_CH_A] = DAC_CH_A;
    dac_sel_ch[DAC_CH_B] = DAC_CH_B;
    dac_sel_ch[DAC_CH_C] = DAC_CH_C;
    dac_sel_ch[DAC_CH_D] = DAC_CH_D;
    dac_sel_ch[DAC_CH_E] = DAC_CH_E;
    dac_sel_ch[DAC_CH_F] = DAC_CH_F;
    dac_sel_ch[DAC_CH_G] = DAC_CH_G;
    dac_sel_ch[DAC_CH_H] = DAC_CH_H;
}

void MLC_DAC_control(uint16_t cmd)
{
#if MCU_TYPE == MCU_TYPE_TMS320F2812 || MCU_TYPE == MCU_TYPE_TMS320F28335
  SpiaRegs.SPITXBUF=cmd;
#endif

#if MCU_TYPE == MCU_TYPE_TMS570LS3137
  spiTransmitData(spiREG2, &spi2_conf, 1, &cmd);
#endif
}


void MLC_DAC_reset(void)
{
  uint16_t config = 0x8000;

#if MCU_TYPE == MCU_TYPE_TMS320F2812 || MCU_TYPE == MCU_TYPE_TMS320F28335
  // reset DAC
  SpiaRegs.SPITXBUF=0xF000;
  //SpiaRegs.SPITXBUF=0xE000;

  // wait for reset done
  DELAY_US(1000);

  // set LDAC to ignored
  SpiaRegs.SPITXBUF=0xA000;
#endif

#if MCU_TYPE == MCU_TYPE_TMS570LS3137 //TODO: Implement it
  config = 0xF000;
  spiTransmitData(spiREG2, &spi2_conf, 1, &config);
  DELAY_US(1000);
  config = 0xA000;
  spiTransmitData(spiREG2, &spi2_conf, 1, &config);
  config = 0x8000;
#endif
  // setup DAs
  // gain 2xVref, Ref buffered
#if DAC_USE_GAINx2 == 1
  config |= 0x0030;
#endif
#if DAC_USE_REF_BUFFER == 1
  config |= 0x000C;
#endif
#if DAC_USE_VCC_AS_REF == 1
  config |= 0x0003;
#endif

#if MCU_TYPE == MCU_TYPE_TMS320F2812 || MCU_TYPE == MCU_TYPE_TMS320F28335
  SpiaRegs.SPITXBUF=config;
#endif

#if MCU_TYPE == MCU_TYPE_TMS570LS3137 //TODO: Implement it
  spiTransmitData(spiREG2, &spi2_conf, 1, &config);
#endif
}

void MLC_DAC_write(uint16_t count)
{
  unsigned int i;
  uint16_t data[8];

  // avoid over indexing
  if (count > 8){
          count = 8;
  }

  for (i=0;i<count;i++){
          // send data to DAC, take care about bad values, they will not interfere with dac_sel_ch
#if MCU_TYPE == MCU_TYPE_TMS320F2812 || MCU_TYPE == MCU_TYPE_TMS320F28335
          SpiaRegs.SPITXBUF = ((*(dac_values+i)&0x0FFF)|(*(dac_sel_ch+i)<<12));
#endif

#if MCU_TYPE == MCU_TYPE_TMS570LS3137 //TODO: Implement better send of buffer with DMA
//        *(dac_values+i) = ((*(dac_values+i)&0x0FFF)|(*(dac_sel_ch+i)<<12));
          data[i] = ((*(dac_values+i)&0x0FFF)|(*(dac_sel_ch+i)<<12));
#endif
  }
#if MCU_TYPE == MCU_TYPE_TMS570LS3137
  spiTransmitData(spiREG2, &spi2_conf, count, data);
#endif
}

// konfigurace USART modulu
void MLC_SCI_init(unsigned long int baudrate)
{

#if MCU_TYPE == MCU_TYPE_TMS320F28335
        unsigned int temp;
        EALLOW;
        // Select GPIOs to be Sci pins
        GpioCtrlRegs.GPBMUX2.bit.GPIO62 = 0x1;
        GpioCtrlRegs.GPBMUX2.bit.GPIO63 = 0x1;
        EDIS;

        // 1-stopbit, bez parity, 8b data
        ScicRegs.SCICCR.all = 0x0007;
        ScicRegs.SCICCR.bit.LOOPBKENA = 0;
        // reset and allow RX and TX
        ScicRegs.SCICTL1.all =0x0003;

#if USE_SCI_TX_FIFO == 1
        ScicRegs.SCIFFTX.bit.SCIFFENA = 1;
        ScicRegs.SCIFFTX.bit.TXFIFOXRESET = 0;
        ScicRegs.SCIFFTX.bit.TXFIFOXRESET = 1;
#endif

#if USE_SCI_RX_FIFO == 1
        ScicRegs.SCIFFTX.bit.SCIFFENA = 1;
        ScicRegs.SCIFFRX.bit.RXFIFORESET = 0;
        ScicRegs.SCIFFRX.bit.RXFIFORESET = 1;
#endif

        // calculate baudrate
        // 150000000/32/baudrate
        temp = ((150000000 >> 5)/baudrate)-1;
        // setup baudrate
        ScicRegs.SCIHBAUD = (temp & 0xFF00)>>8;
        ScicRegs.SCILBAUD = (temp & 0x00FF);
        // release from reset and allow RX and TX
        ScicRegs.SCICTL1.all =0x0023;
        // soft mode - it solves data corruption when debugger access DSP
        ScicRegs.SCIPRI.bit.SOFT = 0x1;
#endif

#if MCU_TYPE == MCU_TYPE_TMS320F2812
        EALLOW;
        GpioMuxRegs.GPGMUX.bit.SCITXDB_GPIOG4 = 0x1;
        GpioMuxRegs.GPGMUX.bit.SCIRXDB_GPIOG5 = 0x1;
        EDIS;

        ScibRegs.SCICCR.all = 0x0007;
        ScibRegs.SCICCR.bit.LOOPBKENA = 0;
        // reset and allow RX and TX
        ScibRegs.SCICTL1.all =0x0003;

#if USE_SCI_TX_FIFO == 1
        ScibRegs.SCIFFTX.bit.SCIFFENA = 1;
        ScibRegs.SCIFFTX.bit.TXFIFOXRESET = 0;
        ScibRegs.SCIFFTX.bit.TXFIFOXRESET = 1;
#endif

#if USE_SCI_RX_FIFO == 1
        ScibRegs.SCIFFTX.bit.SCIFFENA = 1;
        ScibRegs.SCIFFRX.bit.RXFIFORESET = 0;
        ScibRegs.SCIFFRX.bit.RXFIFORESET = 1;
#endif
#endif

#if MCU_TYPE == MCU_TYPE_TMS320F2812 || MCU_TYPE == MCU_TYPE_TMS320F28335
        // calculate baudrate
        // 150000000/32/baudrate
        temp = ((150000000 >> 5)/baudrate)-1;
        // setup baudrate
        ScibRegs.SCIHBAUD = (temp & 0xFF00)>>8;
        ScibRegs.SCILBAUD = (temp & 0x00FF);
        // release from reset and allow RX and TX
        ScibRegs.SCICTL1.all =0x0023;
        // soft mode - it solves data corruption when debugger access DSP
        ScibRegs.SCIPRI.bit.SOFT = 0x1;
#endif
}

char MLC_SCI_char_avail(void)
{
#if MCU_TYPE == MCU_TYPE_TMS320F28335
#if USE_SCI_RX_FIFO == 0
        return ScicRegs.SCIRXST.bit.RXRDY;
#else
        return ScicRegs.SCIFFRX.bit.RXFFST;
#endif
#endif

#if MCU_TYPE == MCU_TYPE_TMS320F2812
#if USE_SCI_RX_FIFO == 0
        return ScibRegs.SCIRXST.bit.RXRDY;
#else
        return ScibRegs.SCIFFRX.bit.RXFIFST;
#endif
#endif

#if MCU_TYPE == MCU_TYPE_TMS570LS3137 //TODO: Implement it
        return 0;
#endif
}

char MLC_SCI_wait_send(void){
#if MCU_TYPE == MCU_TYPE_TMS320F28335
        return ScicRegs.SCICTL2.bit.TXEMPTY;
#endif

#if MCU_TYPE == MCU_TYPE_TMS320F2812
        return ScibRegs.SCICTL2.bit.TXEMPTY;
#endif

#if MCU_TYPE == MCU_TYPE_TMS570LS3137 //TODO: Implement it
        return 0;
#endif
}

char MLC_SCI_recv_char(void)
{
#if MCU_TYPE == MCU_TYPE_TMS320F28335
        // wait for char
#if USE_SCI_RX_FIFO == 0
        while (ScicRegs.SCIRXST.bit.RXRDY == 0);
#else
        while (ScicRegs.SCIFFRX.bit.RXFFST == 0);
#endif
        return ScicRegs.SCIRXBUF.all;
#endif

#if MCU_TYPE == MCU_TYPE_TMS320F2812
#if USE_SCI_RX_FIFO == 0
        while (ScibRegs.SCIRXST.bit.RXRDY == 0);
#else
        while (ScibRegs.SCIFFRX.bit.RXFIFST == 0);
#endif
        return ScibRegs.SCIRXBUF.all;
#endif

#if MCU_TYPE == MCU_TYPE_TMS570LS3137 //TODO: Implement it
        return 0;
#endif

}

// blocking send char
void MLC_SCI_send_char(char c)
{
#if MCU_TYPE == MCU_TYPE_TMS320F28335
        // wait for send
#if USE_SCI_TX_FIFO == 0
        while (ScicRegs.SCICTL2.bit.TXEMPTY == 0);
#else
        while (ScicRegs.SCIFFTX.bit.TXFFST > 0xF);
#endif
        ScicRegs.SCITXBUF = c;
#endif

#if MCU_TYPE == MCU_TYPE_TMS320F2812
#if USE_SCI_TX_FIFO == 0
        while (ScibRegs.SCICTL2.bit.TXEMPTY == 0);
#else
        while (ScibRegs.SCIFFTX.bit.TXFFST > 0xF);
#endif
        ScibRegs.SCITXBUF = c;
#endif

#if MCU_TYPE == MCU_TYPE_TMS570LS3137 //TODO: Implement it
#endif
}

void MLC_SCI_send_char_wait(char c)
{
#if MCU_TYPE == MCU_TYPE_TMS320F28335
        MLC_SCI_send_char(c);
        while (!ScicRegs.SCICTL2.bit.TXEMPTY);
#endif

#if MCU_TYPE == MCU_TYPE_TMS320F2812
        MLC_SCI_send_char(c);
        while (!ScibRegs.SCICTL2.bit.TXEMPTY);
#endif

#if MCU_TYPE == MCU_TYPE_TMS570LS3137 //TODO: Implement it
#endif
}

// blocking send str
void MLC_SCI_send_str(char* str)
{
        while (*str != '\0')
        {
                MLC_SCI_send_char(*str++);
        }
}

// set pwr output while other untouched
void MLC_PWR_on(uint16_t pwr){
        pwr_out_state |= pwr ;
        MLC_WRITE(WRITE_PWR_OUT, pwr_out_state);
}

// reset pwr output while other untouched
void MLC_PWR_off(uint16_t pwr){
        pwr_out_state &=  ~pwr;
        MLC_WRITE(WRITE_PWR_OUT, pwr_out_state);
}

// set debug output while other untouched
void MLC_DBG_set(uint16_t dbg){
        dbg_state |= dbg;
        MLC_WRITE(WRITE_DBGLEDS, dbg_state);
}

// clear debug output while other untouched
void MLC_DBG_clear(uint16_t dbg){
        dbg_state &=  ~dbg;
        MLC_WRITE(WRITE_DBGLEDS, dbg_state);
}

/* EOF */